Graph Analysis and Transformation Techniques for Runtime Minimization in Multi-Threaded Architectures
نویسندگان
چکیده
This paper describes a method of analysis for de tecting and minimizing memory latency using a di rected data dependency graph produced from a com piler These results are applicable to the develop ment of methods for the optimal generation of instruc tion threads to be executed on a multi threaded data driven architecture The resulting runtime reductions are accomplished by minimizing memory access times by individual processing elements Additionally these analysis methods can be used to predict measures of achievable parallelism for a given program graph which can be exploited by a recon gurable multi threaded ar chitecture
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